Cycle-Accurate On-Chip Telemetry for Detecting Memory-Bus Saturation in Edge Servers
Keywords:
Edge Computing, Memory-Bus Saturation, On-Chip Telemetry, Hardware Performance Counters, Quality of ServiceAbstract
The rapid proliferation of edge computing has pushed increasingly complex, data-intensive workloads closer to the data source, placing unprecedented strain on the memory subsystems of edge servers. Unlike hyperscale cloud infrastructure, edge servers are constrained by strict power, thermal, and area limitations, often relying on shared memory architectures with limited bandwidth. This architectural constraint makes them highly susceptible to memory-bus saturation, a condition where concurrent memory requests from multiple processing elements overwhelm the memory controller, leading to severe queueing delays and unpredictable latency spikes. Traditional performance monitoring units and software-based profiling tools operate at coarse-grained intervals, typically in the millisecond range, rendering them incapable of capturing transient microbursts that cause momentary but disruptive memory saturation. This paper proposes a novel cycle-accurate on-chip telemetry framework designed specifically to detect and characterize memory-bus saturation at the microarchitectural level in edge servers. By integrating lightweight hardware probes directly into the memory interconnect, the proposed system captures bus transaction data on a per-cycle basis, applying real-time filtering and compression to minimize telemetry overhead. We present the complete hardware and software codesign, including the mathematical models for saturation detection and the architectural implementation of the telemetry agents. Experimental evaluations conducted on a heavily heavily instrumented system-on-chip emulation platform demonstrate that our cycle-accurate approach achieves superior accuracy in identifying transient saturation events compared to conventional sampling methods, with minimal area and power overhead. The findings provide a critical foundation for developing proactive resource management and quality-of-service provisioning mechanisms in next-generation edge infrastructure.
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